In testing IC devices, an automatic test handler is frequently used in combination with an IC tester to automatically provide IC devices (DUT) to be tested to a test position at a test head of the IC tester. There are generally two types of test handlers, a vertical transfer type handler wherein the IC devices to be tested are transferred in a vertical direction with their own gravities and a horizontal transfer type handler wherein IC devices placed on a tray or carrier module are transferred in a horizontal direction to the test position.
In a typical horizontal transfer type test handler, IC devices to be tested are aligned on a tray in a loading area and picked, one by one, and transferred to a test head of an IC tester and placed on a test socket or contactor of the test head by a pick and place mechanism or a movable arm of the test handler. The tested IC devices are taken out from the test head and transferred to an unloading area. The tested IC devices are classified to two or more trays in a sorting area based on the test results.
Such a horizontal transfer type test handler is described in detail in a Japanese patent application No. 5-275570 filed by the same assignee of the present invention. FIG. 5 is a plan view showing the configuration of the conventional test handler disclosed in the Japanese patent application No. 5-275570.
In FIG. 5, a test handler 9 includes a movable arm 12 which is movably mounted on a pair of rails 11.sub.1 and 11.sub.2. The movable arm 12 moves on the rails 11.sub.1 and 11.sub.2 in a X direction on the surface of the test handler 9. On the movable arm 12, there is provided a movable carrier 13 which moves along the movable arm 12 in a Y direction on the surface of the test handler 9. Thus, the movable carrier 13 can take any positions on the surface, i.e., the X-Y plane of the test handler 9 within the area determined by the rails 11.sub.1 and 11.sub.2 and the movable arm 12.
In the movable area of the carrier 13, a loader 14, an unloader 23, and an empty tray area 26 are provided as well as a heater area 15. Sorters 24 and 25 are also provided in the movable area of the movable carrier 13. More sorters may be provided depending on the numbers of classification of the tested DUTs. In the right hand side of FIG. 5, within the movable area of the carrier 13, the test handler 9 includes buffers 16 and 22.
Another set of a movable arm and a movable carrier is used in a test area 33 of the test handler 9. A movable arm 18 is movably mounted on a pair of rails 17.sub.1 and 17.sub.2. The movable arm 18 moves on the rails 17.sub.1 and 17.sub.2 in a X direction on the surface of the teat handler 9. On the movable arm 18, there is provided a movable carrier 19 which moves along the movable arm 18 in a Y direction on the surface of the test handler 9. Thus, the movable carrier 19 can take any positions on the surface, i.e., the X-Y plane of the test handler 9 within the area determined by the rails 17.sub.1 and 17.sub.2 and the movable arm 12. A test contactor 21 is provided in the test area of the handler 9 which is connected to the IC tester.
In the loader 14, a plurality of trays 7 are piled in a tray cassette (not shown). Each of the trays 7 carries a plurality of DUTs 10 aligned thereon. The DUTs in the uppermost tray are taken out, one by one, or two or more at the same time, by the movable carrier 13. The DUTs are placed on the heater area 15, if necessary, to receive the heat for raising the inner temperature to a predetermined level. This heating process is commonly used in an automatic test handler to proceed a high temperature test for DUTs. A test handler may also include a cooler to perform a low temperature test.
The heated DUTs are then placed on the buffer 16 which moves in the X direction to the dotted line position in FIG. 5 in the test area 33. In the test area 33, the movable carrier 19 picks the DUT 10 on the buffer 16 and places the DUT on the test contactor 21. Although not shown, test signals from the IC tester are provided to the test contactor 21 and applied to the DUT 10. The resulting output signals from the DUT 10 are transmitted to the IC tester through the test contactor 21 to be evaluated by the IC tester by comparing them with expected data.
After the test, the DUT 10 is picked by the movable carrier 19 and placed on the buffer 22 which is positioned in the test area 33 as shown in the dotted line of FIG. 5. The buffer 22 returns to the original position where the movable carrier 13 is transferred to the unloader 23. In this example, when the DUT is non-defective, it is placed on the unloader 23, but if the DUT is defective, it is placed on the sorter 24 or 25 depending on the type of defects. The emptied trays in the loader 14 are shifted to the empty tray area 26.
As in the foregoing, the conventional automatic test handler 9 of FIG. 5 handles the DUTs 10 and transfers the DUTs to the test head of the IC tester to test various electric performances of the DUTs under the predetermined environmental conditions such as the high or low temperature. The DUTs are classified based on the test results, such as (1) conforming devices (2) defective devices or (3) devices need retest. If necessary, the defective devices are further classified depending on the causes of the defects.
FIG. 6 is a schematic diagram showing a perspective view of the automatic test handler of FIG. 5 in which the parts corresponding to FIG. 5 are denoted by the same reference numerals. With reference to FIG. 6, the outer configuration of the automatic test handler for the IC tester is explained. Numeral 31 designates a loader and unloader. When opening the cover by a handle 36, there is shown the loader and unloader 31 wherein tray cassettes are respectively provided. A plurality of IC trays 7, for example more than twenty IC trays, are installed in each tray cassette. Each of the IC tray 7 carries, for example 50 or more DUTs, depending on the size of the DUT. Since the loader 14 has a capacity of 20-50 IC trays, 1000-3000 DUTs are installed in the loader 14 prior to the start of the test. As noted above, the DUTs are transferred horizontally over the surface of the test handler.
The heater 15 is used for testing the DUTs under the high temperature. Numeral 33 designates the test area where the DUTs are placed on the test contactor. Although not shown, the test head of the IC tester is fixed to the opening provided under the test area 33. The test head of the IC tester and the test contactor in the test area 33 of the handler are electrically connected so that the DUT is provided with the test signals from the IC tester when placed on the test contactor. After the electrical test, there may be a visual test in which an outward appearance of the IC devices such as a shape, color, surface roughness and the like are tested. The DUTs are then proceeded to the sorting process based on the test results.
A control and power source 34 works as a system controller to control the operation of the test handler 9 as well as provide power to the test handler 9. A TV monitor 35 is to monitor the positioning between the DUT and the test contactor. By opening the cover with the handle 36, the surface of the test handler as shown in the plan view of FIG. 5 will be disclosed.
As shown in the foregoing example, the conventional test handler is integrally formed of the test area, the loader and unloader, and the sorting area. The IC tester and the automatic test handler are fixed together and installed in a special test room in, for example, a semiconductor production plant. The test room is a clean room in which temperature, humidity and dust of air are controlled in a degree higher than the ordinary factory. Since the recent semiconductor devices are complicated, miniaturized and high speed, such a clean room is necessary to fully evaluate the devices.
As a consequence, the cost per square meter of the test room is significantly higher than the other facilities in the semiconductor production plant. Because the floor space cost of the test room is high, the overall test cost of the IC devices becomes high. Thus, there is a need to effectively use the surface area of the test room to decrease the test cost of the IC devices.
The IC tester has been reduced in size by using high density electronics parts and by incorporating an improved electrical and mechanical design. However, since most of the functional blocks in the horizontal transfer type test handler are formed of mechanical parts, it is difficult to decrease the overall size of the test handler. For example, the size of the automatic test handler of FIGS. 5 and 6 is 180 cm by 106 cm in plan view, which is considered to be large relative to the size of the IC tester. Thus, the size of the automatic test handler tends to limit the reduction of the overall test cost, since it occupies a relatively large area of the test room.
Further, the time required for testing the DUTs in the test area and the time required for sorting the DUTs are usually different. For example, the testing time may be longer than the sorting time for specific kinds of DUTs or specific type of test. In other instances, the testing time may be shorter than the sorting time. In either case, the overall time required for the automatic test handler to evaluate the IC devices is determined by the slowest step. Thus, for example, even if an automatic test handler has an ability of high speed testing, the overall test efficiency is limited by the low speed of sorting.
Japanese Patent Publication No. 6-95125 discloses a structure of an automatic test handler in which a test area and a sorting area are mechanically separated. This technology includes an information storage which is attached to each tray cassette, an information write-in device for writing the position (coordinates) and the test results of each DUT in a tray in the information storage which is attached to the tray cassette, and an information read-out device for reading the data stored in the information storage attached to the tray cassette.
In this conventional example, the information for the DUTs is provided for every tray cassette. Thus, IC trays in the tray cassette are not identifiable from one another, which requires that the IC trays have to be strictly united to the tray cassette. In case where the order of the IC tray in the tray cassette has accidentally changed, the information regarding the DUTs becomes useless. Further, since all the test information of the DUTs in the tray cassette are stored in the information storage provided to the tray cassette, the volume of the information to be stored is limited by the capacity of the storage. Thus, there is a disadvantage in which the detailed test data, such as designations of the IC tester, test area and test sockets and the like are not available through the information storage.